**Publications **

[**Journal Papers**] [**Book Chapter**] [**Conference Papers**] [**Patents**]

- C. -C. Tu, Y. -K. Wang and T. -H. Lin, “A Low-Noise Area-Efficient Chopped VCO-based CTDSM for Sensor Applications in 40-nm CMOS,"
*IEEE J. Solid-State Circuits*, vol. 52, pp. 2523-2532, Oct. 2017. - C.-H. Weng, Y.-Y. Lin, and T.-H. Lin, “A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer,"
*IEEE Transactions on Circuits and Systems I: Regular Papers*, vol. 64, pp. 1085-1093, May 2017. - Y.-L. Tsai, C.-Y. Lin, B.-C. Wang, and T.-H. Lin, “A 330-uW 400-MHz BPSK Transmitter in 0.18-um CMOS for Bio-medical Applications,"
*IEEE Trans. Circuits and Systems-II: Express Briefs*, vol. 63, pp. 448-452, May 2016. - C.-H. Weng, T.-A. Wei, E. Alpman, C.-T. Fu, and T.-H. Lin, “A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer,”
*IEEE J. of Solid-State Circuits*, vol. 51, no. 5, pp. 1234-1245, May 2015. - C.-H. Weng, C.-K. Wu and T.-H. Lin, “A CMOS Thermistor-Embedded Continuous-Time Delta-Sigma Temperature Sensor With a Resolution FoM of 0.65 pJ°C
^{2},”*IEEE J. of Solid-State Circuits*, vol. 50, no. 11, pp. 1-10, Nov. 2015. - F.-C. Huang, B.-C. Wang, Y.-L. Tsai, and T.-H. Lin, “An Energy-Efficient QPSK Demodulation Scheme with Injection-Locking Technique for Green Radio Communication,”
*IEEE International Conference on Green Computing and Communications*, pp. 614-617, Sep. 2014. - C.-C. Lin, C.-H. Weng, T.-A. Wei, Y.-Y. Lin, and T.-H. Lin, “A TDC-based Two-step Quantizer with Swapper Technique for a Multi-bit Continuous-time Delta-sigma Modulator,"
*IEEE TCAS-2*, vol. 61, pp. 75-79, Feb. 2014. - Y.-H. Liu, L.-G. Chen, C.-Y. Lin, and T.-H. Lin, “A 650-pJ/bit MedRadio Transmitter with An FIR-Embedded Phase Modulator for Medical Micro-power Networks (MMNs),"
*IEEE TCAS-1*, pp. 3279-3288, Dec. 2013. - Y.-J. Huang, C.-W. Huang, T.-H. Lin, C.-T. Lin, L.-G. Chen, P.-Y. Hsiao, B.-R. Wu, H.-T. Hsueh, B.-J. Kuo, H.-H. Tsai, H.-H. Liao, Y.-Z. Juang, C.-K. Wang, and S.-S. Lu, “A CMOS cantilever-based label-free DNA SoC with Improved sensitivity for Hepatitis B Virus detection,”
*IEEE Transactions on Biomedical Circuits and Systems*, pp. 820-831, Dec. 2013. - C.-W. Huang, H.-T. Hsueh, Y.-J. Huang, H.-H. Liao, H.-H. Tsai, Y.-Z. Juang, T.-H. Lin, S.-S. Lu, and C.-T. Lin, “A Fully Integrated Wireless CMOS Microcantilever Lab Chip for Detection of DNA from Hepatitis B Virus (HBV),"
*Sensors & Actuators: B. Chemical*, pp. 867-873, Mar. 2013. - C.-H. Weng, C.-C. Lin, Y.-C. Chang, and T.-H. Lin, “A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator with an Asynchronous Sequential Quantizer and Digital Excess Loop Delay Compensation,"
*IEEE TCAS-II*, vol. 58, pp. 867-871, Dec. 2011. - C.-Y. Ho, W.-S. Chan, Y.-Y. Lin, and T.-H. Lin, “A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for Tri-Mode GSM-Edge/UMTS/DVB-T Receivers with Power Scaling Technique,"
*IEEE Journal of Solid-State Circuits*, vol. 46, pp. 2571-2582, Nov. 2011. - T.-H. Lin, C.-C. Chi, W.-H. Chiu, and Y.-H. Huang, “A Synchronous 50% Duty-Cycle Clock Generator in 0.35-μm CMOS,"
*IEEE Trans. on VLSI*, vol. 19, pp. 585-591, April 2011. - Y.-H. Liu and T.-H. Lin, " A Delta-Sigma Pulse-Width Digitization Technique for Super-regenerative Receivers,"
*IEEE Journal of Solid-State Circuits*, vol. 45, pp. 2066-2079, Oct. 2010. - W.-H. Chiu, Y.-H. Huang, and T.-H. Lin, “A Dynamic Phase Error Compensation Technique for Fast-Locking Phase-Locked Loops,”
*IEEE Journal of Solid-State Circuits*, vol. 45, pp. 1137-1149, June 2010. - Y.-H. Liu, C.-L. Li, and T.-H. Lin, “A 200-pJ/b MUX-based RF Transmitter for Implantable Multi-Channel Neural Recording,”
*IEEE T-MTT*, vol. 57, pp. 2533-2541, Oct. 2009. - Y.-H. Liu and T.-H. Lin, “A Wideband PLL-based G/FSK Transmitter in 0.18-mm CMOS,”
*IEEE Journal of Solid-State Circuits*, vol. 44, pp. 2452-2462, Sep. 2009. - T.-H. Lin, C.-L. Ti, and Y.-H. Liu, “Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional-N PLLs,”
*IEEE Trans. Circuits Syst. – I*, vol. 56, pp. 877-885, May 2009. - Y.-L. Tseng, H.-W. Chiu, T.-H. Lin, and F.-S. Jaw, “Miniature Modules for Multi-lead ECG Recording,”
*Biomedical Engineering: Applications, Basis and Communications*, vol. 20, no. 4, pp. 219-222, 2008. - T.-H. Lin, R.-L. Hsu, C.-L. Li, and Y.-C. Tseng, “A 5-GHz, 192.6-dBc/Hz/mW FOM, LC-VCO System with Amplitude Control Loop and LDO Voltage Regulator in 0.18-mm CMOS,”
*IEEE Microwave and Wireless Component Letters*, vol. 17, pp. 730-732, Oct. 2007. - M.-C. Tsai and T.-H. Lin, “Design of a Continuous-Time 3rd-Order Delta-Sigma Modulator with Incremental Data Weighted Averaging,”
*IJEE*, vol. 14, no. 3, pp. 157-165, June 2007. - T.-H. Lin and Y.-J. Lai, “An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL,” IEEE J. Solid-State Circuits, vol. 42, pp. 340-349, Feb. 2007.
- T.-H. Lin, C.-K. Wu, and M.-C. Tsai, “A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-mm CMOS,”
*IEEE Trans. Circuits Syst. – II*, vol. 53, pp. 131-135, Feb. 2007. - T.-H. Lin and Y.-J. Lai, “Time-Based Frequency Band Selection Method for Phase-Locked Loops,”
*IEE Electronics Letters*, vol. 41, issue 23, pp. 1279-1281, Nov. 2005. - T.-H. Lin, W. J. Kaiser, and G. J. Pottie, “Integrated Low-Power Communication System Design for Wireless Sensor Networks,”
*IEEE Communications Magazine*, vol. 42, pp. 142-150, Dec. 2004. - A. Behzad, Z.M. Shi, S. Anand, L. Lin, K. Carter, M. Kappes, Tsung-Hsien (Eric) Lin, T. Nguyen, D. Yuan, S. Wu, Y.C. Wang, V. Fong, A. Rofougaran, “A 5-GHz Direct-Conversion CMOS Transceiver Utilizing Automatic Frequency Control for the IEEE 802.11a Wireless LAN Standard,”
*IEEE Journal of Solid-State Circuits*, pp 2209-2220, Dec. 2003. - T.-H. Lin and W. J. Kaiser, “A 900-MHz 2.5-mA CMOS Frequency Synthesizer with an Automatic SC Tuning Loop,”
*IEEE Journal of Solid-State Circuits*, pp. 424-431, March 2001.

- Yao-Hung Liu and Tsung-Hsien Lin, “Integrated Microsystems: Electronics, Photonics and Biotechnology; Chapter 4: Design of a Low-power Dual-mode MUX-based Transmitter for Bio-medical Applications,”
*CRC Press*, Taylor & Francis Inc., Sep. 2011.

- C.-Y. Chiu, Z.-C. Zhang, and T.-H. Lin, “A 0.6-V 200-kbps 429-MHz ultra-low-power FSK transceiver in 90-nm CMOS,"
*IEEE A-SSCC*, pp. 193-196, Nov. 2017. - C.-Y. Lin, T.-J. Wang, and T.-H. Lin, “A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS,"
*IEEE A-SSCC*, pp. 253-256, Nov. 2017. - S.-Y. Lin and Tsung-Hsien Lin, “An area-efficient amplifier-less digitally-controlled li-ion battery charger in 0.35μm CMOS,"
*IEEE A-SSCC*, pp. 37-40, Nov. 2017. - C.-Y. Lin, T.-J. Wang, T.-H. Liu, and T.-H. Lin, “An ultra-low power 169-nA 32.768-kHz fractional-N PLL,"
*IEEE A-SSCC*, pp. 45-48, Nov. 2017. - C.-C. Tu, F.-W. Lee, H.-C. Chen, Y.-K. Wang, and T.-H. Lin, “An area-efficient capacitively-coupled sensor readout circuit with current-splitting OTA and FIR-DAC,"
*IEEE A-SSCC*, pp. 57-60, Nov. 2017. - C. -C. Tu, Y. -K. Wang, and T. -H. Lin, “A 0.06mm2 ± 50mV Range -82dB THD Chopper VCO-based Sensor Readout Circuit in 40nm CMOS,"
*IEEE Symp. VLSI Circuits*, Jun. 2017. - T.-Y. Chen, Y.-L. Tsai, and T.-H. Lin, “A current feedback instrumentation amplifier with chopping and dynamic element matching techniques and employing the current-reuse technique in input/feedback stages,"
*IEEE VLSI-DAT*, pp. 1-4, Apr. 2017. - C.-Y. Lin and T.-H. Lin, “A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques,"
*IEEE A-SSCC*, pp. 93-96, Nov. 2016. - C.-C. Tu, K.-. Chen, T.-Y. Wu, and T.-H. Lin, “An area-efficient wideband CMOS hall sensor system for camera autofocus systems,"
*IEEE A-SSCC*, pp. 33-36, Nov. 2016. - C.-C. Tu, Y.-K. Wang, and T.-H. Lin, “A 40-nV/VHz 0.0145-mm2 sensor readout circuit with chopped VCO-based CTDSM in 40-nm CMOS,"
*IEEE A-SSCC*, pp. 45-48, Nov. 2016. - T.-W. Wang, Y.-L. Tsai, C.-R. Lee, F.-L. Hung, and T.-H. Lin, “A 0.5-V sub-mW energy-efficient receiver in 0.18-μm CMOS for IoT applications,"
*IEEE ISOCC*, pp. 157-158, Oct. 2016. - Y.-L. Tsai, J.-Y. Chen, C.-Y. Lin, B.-C. Wang, T.-Y. Yeh, T.-H. Lin, “An energy-efficient differential-BPSK transceiver for IoT applications,"
*IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)*, pp.

1-3, Aug. 2016. - C.-H. Lu, J,-A. Li, and T.-H. Lin, “A 13.56-MHz passive NFC tag IC in 0.18-μm CMOS process for biomedical applications,"
*IEEE VLSI-DAT*, pp. 1-4, April 2016. - C.-H. Weng, W.-H. Huang, E. Alpman, and T.-H. Lin, “A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS,"
*IEEE A-SSCC*, pp. 1-4, Nov. 2015. - C.-H. Weng, T.-A. Wei and T.-H. Lin, “A 127 fJ/Conv. Continuous-Time Delta-Sigma Modulator with a DWA-Embedded Two-Step Time-Domain Quantizer,"
*IEEE VLSI-DAT*, Apr. 2015. - Y.-L. Tsai, F. -W. Lee, T. -Y. Chen, and T. -H. Lin, “A 2-channel −83.2dB crosstalk 0.061mm2 CCIA with an orthogonal frequency chopping technique,"
*IEEE International Solid-State Circuits Conference (ISSCC)*, pp 92-93, Feb. 2015. - C.-H. Weng, C.-K. Wu and T.-H. Lin, “A CMOS Thermistor-Embedded Continuous-Time Delta-Sigma Temperature Sensor with a Resolution of 0.01 °C,”
*IEEE A-SSCC*, pp. 149-152, Nov. 2014. - C. -C. Tu, F. -Y. Lee and T. -H. Lin, “An Area-Efficient Capacitively-Coupled Instrumentation Amplifier with a Duty-Cycled Gm-C DC Servo Loop in 0.18-um CMOS,"
*IEEE A-SSCC*, pp. 153-156, Nov. 2014. - C. -C. Tu, F. -Y. Lee and T. -H. Lin, “A 135 uW 0.46mOhm/rtHz Thoracic Impedance Variance Monitor with Square-Wave Current Modulation,"
*IEEE A-SSCC*, pp. 305-308, Nov. 2014. - F.-C. Huang, M.-Y. Hsu, T.-H. Lin, and C.-K. Wang, “2.4-GHz Discrete-time Receiver without Subsampling Mixer,"
*IET Electronics Letters*, vol. 50, no. 21, pp. 1549-1551, Oct. 2014. - F.-C. Huang, B.-C. Wang, Y.-L. Tsai, and T.-H. Lin, “An Energy-Efficient QPSK Demodulation Scheme with Injection-Locking Technique for Green Radio Communication,”
*IEEE International Conference on Green Computing and Communications*, Sep. 2014. - F.-C. Huang, S.-C. Hsu, Y.-L. Tsai, Y.-Y. Lin, and T.-H. Lin, “LMS-Based Digital Background Linearization Technique for VCO-Based Delta-Sigma ADC,"
*IEEE MWSCAS*, pp. , Aug. 2014. - C.-H. Weng, T.-A. Wei, E. Alpman, C.-T. Fu, Y.-T. Tseng, and T.-H. Lin, “An 8.5MHz 67.2dB SNDR CTDSM with ELD Compensation Embedded Twin-T SAB and Circular TDC-based Quantizer in 90nm CMOS,"
*IEEE Symposium on VLSI Circuits*, pp. , June 2014. - Y.-L. Tsai, J.-Y. Chen, B.-C. Wang, T.-Y. Yeh, and T.-H. Lin, “A 400MHz 10Mbps D-BPSK Receiver with a Reference-less Dynamic Phase-to-Amplitude Demodulation Technique,"
*IEEE Symposium on VLSI Circuits*, pp. , June 2014. - C.-C. Tu and T.-H. Lin, “Analog Front-End Amplifier for ECG Applications with Feed-Forward EOS Cancellation,"
*IEEE VLSI-DAT*, Apr. 2014. - C.-C. Tu and T.-H. Lin, “Measurement and Parameter Characterization of Pseudo-Resistor Based CCIA for Biomedical Applications,"
*IEEE ISBB*, Apr. 2014. - Y.-D. Chang, C.-H. Weng, T.-H. Lin, and C.-K. Wang, “A 379nW 58.5dB SNDR VCO-Based ΔΣ Modulator for Bio-Potential Monitoring,"
*IEEE Symposium on VLSI Circuits*, pp. 66-67, June 2013. - C.-C. Lin, C.-H. Weng, and T.-H. Lin, “A Low-Power Dual-Mode Continuous-Time Delta-Sigma Modulator with a Folded Quantizer,"
*IEEE VLSI-DAT*, Apr. 2013. - T.-H. Lin and C.-Y. Lin, “Towards a Versatile Energy-Efficient Wireless Transmitter Design for Bio-medical Applications,"
*IEEE IWS*, Apr. 2013. (Invited) - Y.-L. Tsai, P.-Y. Hsiao, L.-G. Chen, C.-W. Huang, H.-T. Hsueh, C.-C. Tu, C.-T. Lin, S.-S. Lu, and T-H. Lin, “A Sensor-Merged Oscillator-Based Readout Circuit for Pizeo-Resistive Sensing Applications,"
*IEEE BioCAS*, pp. 332-335, Nov. 2012. - Y.-C. Chuang, S.-L. Tsai, C.-E. Liu, and T.-H. Lin, “An All-Digital Phase-Locked Loop with Dynamic Phase Control for Fast Locking,"
*IEEE A-SSCC*, pp. 297-300, Nov. 2012. - C.-Y. Lin, Y.-H. Liu, C.-T. Fu, H. Lakdawala, and T.-H. Lin, “An Energy-Efficient 2.4-GHz PSK/16-QAM Transmitter,"
*IEEE A-SSCC*, pp. 361-364, Nov. 2012. - W.-N. Liu and T.-H. Lin, “An Energy-Efficient Ultra-Wideband Transmitter with an FIR Pulse-Shaping Filter,"
*IEEE VLSI-DAT,*pp. , Apr. 2012. - Y.-C. Chang, W.-H. Chiu, C.-C. Lin, and T.-H. Lin, “A 4MHz BW 69dB SNDR Continuous-Time Delta-Sigma Modulator with Reduced Sensitivity to Clock Jitter,"
*IEEE A-SSCC*, pp. 265-268, Nov. 2011. - P.-Y. Hsiao, Y.-H. Liu, and T.-H. Lin, “An Energy-Efficient Super-Regenerative ASK Receiver with a DS-Based Pulse-Width Demodulator,"
*IEEE A-SSCC*, pp. 369-372, Nov. 2011. - Y.-H. Liu, H.-H. Lo, and T.-H. Lin, “A 15-mW 2.4-GHz IEEE 802.15.4 Transmitter with a FIR-embedded Phase Modulator,"
*IEEE A-SSCC*, pp. 281-284, Nov. 2011. - C.-W. Huang, Y.-J. Huang, T.-H. Lin, C.-T. Lin, J.-K. Lee, L.-G. Chen, P.-Y. Hsiao, B.-R. Wu, H.-T. Hsueh, B.-J. Kuo, H.-H. Tsai, H.-H. Liao, Y.-Z. Juang, and S.-S. Lu, “An Integrated Microcantilever-Based Wireless DNA Chip for Hepatitis B Virus (HBV) DNA Detection,"
*MicroTAS*, Oct. 2011. - Y.-H. Tsai, Y.-C. Kao, W.-N. Liu, T.-H. Lin, and F.-S. Jaw, “Wireless Recording of Multichannel Action Potential for Freely Moving Rat,"
*European IFMBE MBEC*, Sep. 2011. - W.-H. Chiu and T.-H. Lin, “A 3.6GHz 1MHz-Bandwidth DS Fractional-N PLL with a Quantization-Noise Shifting Architecture in 0.18mm CMOS,"
*IEEE Symposium on VLSI Circuits*, pp. 114-115, June 2011. - C.-K. Wu, W.-S. Chan, and T.-H. Lin, “A 80kS/s 36mW Resistor-based Temperature Sensor using BGR-free SAR ADC with a Unevenly-weighted Resistor String in 0.18μm CMOS,"
*IEEE Symposium on VLSI Circuits*, pp. 222-223, June 2011. - Y.-J. Huang, C.-W. Huang, T.-H. Lin, C.-T. Lin, L.-G. Chen, P.-Y. Hsiao, B.-R. Wu, H.-T. Hsueh, B.-J. Kuo, H.-H. Tsai, H.-H. Liao, Y.-Z. Juang, C.-K. Wang, and S.-S. Lu, “A Fully-integrated Cantilever-based DNA Detection SoC in a CMOS Bio-MEMS Process,"
*IEEE Symposium on VLSI Circuits*, pp. 50-51, June 2011. - C.-Y. Ho, Y.-Y. Lin, and T.-H. Lin, " A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for Tri-Mode GSM-Edge/UMTS/DVB-T Receivers with Power Scaling Technique,"
*IEEE A-SSCC*, pp. 145-148, Nov. 2010. - T.-C. Chen, T.-H. Lee, Y.-H. Chen, T.-C. Ma, T.-D. Chuang, C.-J. Chou, C.-H. Yang, T.-H. Lin, and L.-G. Chen, “1.4μW/channel 16-channel EEG/ECoG Processor for Smart Brain Sensor SoC,” accepted to
*IEEE Symposium on VLSI Circuits*, pp. 21-22, June 2010. - C.-Y. Ho, Y.-Y. Lin, and T.-H. Lin, “Dual-Mode Continuous-Time Quadrature Bandpass DS Modulator with Pseudo-random Quadrature Mismatch Shaping Algorithm for Low-IF Receiver Application,"
*IEEE ISCAS*, pp. 25-28, May 2010. - W.-H. Chiu, C.-Y. Cheng, and T.-H. Lin, “A 5-GHz Relative-Phase Cancellation Fractional-N Phase-Locked Loops in 0.13-µm CMOS,"
*IEEE ISCAS*, pp. 2996-2999, May 2010. - H.-H. Liu, C.-J. Tung, Y.-H. Liu, and T.-H. Lin, “A 400-MHz Super-Regenerative Receiver with a Fast Digital Frequency Calibration,"
*IEEE VLSI-DAT*, pp. 54-57, Apr. 2010. - C.-J. Chou, B.-J. Kuo, and T.-H. Lin, “A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-µm CMOS,"
*IEEE VLSI-DAT*, pp. 295-298, Apr. 2010. - W.-H. Chiu, T.-S. Chang, and T.-H. Lin, “A Charge Pump Current Calibration Technique for DS Fractional-N PLLs in 0.18-µm CMOS,"
*IEEE A-SSCC*, pp. 73-76, Nov. 2009. - K.-C. Liao, P.-S. Huang, W.-H. Chiu, and T.-H. Lin, “A 400-MHz/900-MHz/2.4-GHz Multi-band FSK Transmitter in 0.18-µm CMOS,"
*IEEE A-SSCC*, pp. 353-356, Nov. 2009. - Y.-H. Liu, H.-H. Liu, and T.-H. Lin, “A Super-Regenerative ASK Receiver with Delta-Sigma Pulse-width Digitizer and SAR-based Fast Frequency Calibration for MICS Applications,”
*IEEE Symposium on VLSI Circuits*, pp. 38-39, June 2009. - W.-H. Chiu, Y.-H. Huang, and T.-H. Lin, “A 5GHz Phase-Locked Loop Using Dynamic Phase-Error Compensation Technique for Fast Settling in 0.18-µm CMOS,”
*IEEE Symposium on VLSI Circuits*, pp. 128-129, June 2009. - Y.-H. Liu and T.-H. Lin, “A 3.5-mW 15-Mbps O-QPSK Transmitter for Real-time Wireless Medical Imaging Applications,”
*IEEE CICC*, pp. 599-602, Sep. 2008. - C.-L. Ti, Y.-H. Liu, and T.-H. Lin, “A 2.4-GHz Fractional-N PLL with a PFD/CP Linearization and an Improved CP Circuit,”
*IEEE ISCAS*, pp. 1728-1731, May 2008. - Y.-C. Chen, W.-H. Chiu, and T.-H. Lin, “A 120-MHz Active-RC Filter with an Agile Frequency Tuning Scheme in 0.18-mm CMOS,”
*IEEE VLSI-DAT*, pp. 208-211, April 2008. - C.-J. Tung, Y.-H. Liu, and T.-H. Lin, “A 400-MHz Super-Regenerative Receiver with Digital Calibration for Capsule Endoscope Systems in 0.18-µm CMOS,”
*IEEE VLSI-DAT*, pp. 43-46, April 2008. - W.-H. Chiu, T.-S. Chan, and T.-H. Lin, “A 5.5-GHz 16-mW Fast-Locking Frequency Synthesizer in 0.18-µm CMOS,”
*IEEE A-SSCC*, pp. 456-459, Nov. 2007. - Y.-H. Liu and T.-H. Lin, “An Energy-Efficient 1.5-Mbps Wireless FSK Transmitter with A Sigma Delta-Modulated Phase Rotator,”
*European Solid-State Circuits Conference*, Sept. 2007. - C.-L. Ti and T.-H. Lin, “A 2.4-GHz 18-mW Two-Point Delta-Sigma Modulation Transmitter for IEEE 802.15.4,”
*IEEE VLSI-DAT*, pp. 188-191, April 2007. - B. Marholev, M. Pan, E. Chien, L. Zhang, R. Roufoogaran, S. Wu, I. Bhatti, T.-H. Lin, M. Kappes, S. Khorram, S. Anand, A. Zolfaghari, J. Castaneda, C. Chien, B. Ibrahim, H. Jensen, H. Kim, P. Lettieri, S. Mak, J. Lin, Y. Wong, R. Lee, M. Syed, M. Rofougaran, A. Rofougaran, “A Single-Chip Bluetooth EDR Device in 0.13µm CMOS,”
*IEEE ISSCC*, pp. 558-559, Feb. 2007. - W.-C. Fang and T.-H. Lin, “Low-Power Radio Design for Wireless Smart Sensor Networks,”
*IEEE IIH-MSP*, pp. 583-586. Dec. 2006. - Y.-H. Liu, C.-J. Tung, and T.-H. Lin, “A Low-Power Asymmetrical MICS Wireless Interface and Transceiver Design for Medical Imaging,”
*IEEE BioCAS*, pp. 162-165, Dec. 2006. - T.-H. Lin and C.-C. Chi, “A 70-490 MHz 50% Duty-Cycle Correction Circuit in 0.35-mm CMOS,”
*IEEE A-SSCC*, pp. 91-94, Nov. 2006. - Y.-J. Lai and T.-H. Lin, “A 10-GHz CMOS PLL with an Agile VCO Calibration,” IEEE
*A-SSCC*, pp. 213-216, Nov. 2005. - H.-M. Chien, T.-H. Lin, B. Ibrahim, L. Zhang, M. Rofougaran, A. Rofougaran, and W. J. Kaiser, “A 4GHz Fractional-N Synthesizer for IEEE 802.11a,”
*IEEE Symposium on VLSI Circuits*, pp. 45-49, June 2004. - A. Behzad, E. Lin, K. Carter, M. Kappes, Z.M. Shi, L. Lin, S. Wu, S. Anand, T. Nguyen, D. Yuan, Y.C. Wong, V. Fong, B. Yeung, and A. Rofougaran, “A 4.92-5.845GHz Direct-Conversion CMOS Transceiver for IEEE 802.11a Wireless LAN,”
*IEEE RFIC Symposium*, June 2004. - A. Behzad, L. Lin, Z.M. Shi, S. Anand, K. Carter, M. Kappes, E. Lin, T. Nguyen, D. Yuan, S. Wu, Y.C. Wang, V. Fong, A. Rofougaran, “Direct-Conversion CMOS Transceiver with Automatic Frequency Control for 802.11a Wireless LANs,”
*International Solid-State Circuits Conference (ISSCC)*, pp 356-357, Feb. 2003. - H. Darabi, J. Chiu, S. Khorram, H. Kim, Z. Zhou, E. Lin, S. Jiang, K. Evans, E. Chien, B. Ibrahim, E. Geronaga, L. Tran, R. Rofougaran, “A Dual Mode 802.11b/Bluetooth Radio in 0.35mm CMOS,”
*International Solid-State Circuits Conference (ISSCC)*, pp 86-87, Feb. 2003. - T.-H. Lin and W. J. Kaiser, “A 900MHz, 2.5mA CMOS Frequency Synthesizer with an Automatic SC Tuning Loop,”
*IEEE CICC*, pp. 375-378, May 2000. - R. Rofougaran, T.-H. Lin, and W. J. Kaiser, “CMOS Front-End LNA-Mixer for Micropower RF Wireless Systems,”
*IEEE ISLPED*, pp. 238-242, Aug. 1999. - W. Fang and E. Lin, “A Low-Power VLSI Neural Processor Design for Image Data Compression in a SOI CMOS Technology,”
*Intl. Conf. on Integrated Micro/Nanotechnology for Space Applications*, paper 1.14, April 1999. - G. Asada, I. Bhatti, T.-H. Lin, S. Natkunanthanan, F. Newberg, R. Rofougaran, A. Sipos, S. Valoff, G. J. Pottie, and W. J. Kaiser, “Wireless Integrated Network Sensors (WINS),”
*SPIE*, pp. 11-18, March 1999. - G. Asada, M. Dong, T.-H. Lin, F. Newberg, G. Pottie, H. O. Marcy, and W. J. Kaiser, “Wireless Integrated Network Sensors: Low Power Systems on a Chip,”
*ESSCIRC*, pp. 9-16, Sep. 1998. - T.-H. Lin, H. Sanchez, R. Rofougaran, and W. J. Kaiser, “Micropower CMOS RF Components for Distributed Wireless Sensors,”
*IEEE RFIC Symposium*, pp. 157-160, June 1998. - T.-H. Lin, H. Sanchez, H. O. Marcy, and W. J. Kaiser, Wireless Integrated Network Sensors (WINS) for Tactical Information Systems,”
*Government Microcircuit Applications Conference (GMAC)*, 1998.

- Chan-Hsiang Weng, Chun-Kuan Wu, and Tsung-Hsien Lin, “Analog-to-digital converting circuit with temperature sensing and electronic device thereof,”
**US Patent No. 8,957,797**. (Feb. 17, 2015) - Tsung-Hsien Lin, Chen-En Liu, Chen-Chien Liu, Wei-Hou Chiu, and Sung-Lin Tsai, “Frequency tracing circuit and method thereof,”
**US Patent No. 8,824,615**. (Sep. 2, 2014) - Yi-Lin Tsai, Jian-You Chen, Bang-Cyuan Wang, and Tsung-Hsien Lin, “Receiver, signal demodulation module and demodulation method thereof,”
**US Patent No. 8,811,541**. (Aug. 19, 2014) - Tsung-Hsien Lin, Wei-Hao Chiu, and Yu-Hsiang Huang, “Phase locked loop capable of fast locking,” US Patent No. 8,437,441. (May 7, 2013)
- Tsung-Hsien Lin and Yu-Yu Chen, “Modulator with loop delay compensation,”
**US Patent No. 8,072,362**. (Dec. 6, 2011) - Tsung-Hsien Lin and Yu-Yu Chen, “Bandpass delta-sigma modulator,”
**US Patent No. 8,004,437**. (Aug. 23, 2011) - Tsung-Hsien Lin, Chung-Hsing Yang, and Wei-Hou Chiu, “Voltage-to-time converter, and voltage-to-digital converting device,”
**US Patent No. 7,916,064**. (Mar. 29, 2011) - Yao-Hong Liu and Tsung-Hsien Lin, “Frequency Shift Keying Modulator Having Sigma-Delta Modulated Phase Rotator,"
**US Patent No. 7,667,551**. (Feb. 23, 2010) - Chan-Hsiang Weng and Tsung-Hsien Lin, “Delta sigma modulator and method for compensating delta sigma modulators for loop delay,"
**US Patent No. 7,535,392**. (May 19, 2009) - Tsung-Hsien Lin and Hung-Ming Chien, “Linearized fractional-N synthesizer having a gated offset,”
**US Patent No. 7,289,782**. (Oct. 30, 2007) - Tsung-Hsien Lin, “Clock generator having a 50% duty-cycle,”
**US Patent No. 7,250,802**. (July 31, 2007) - Tsung-Hsien Lin, “Calibration of a Phase Locked Loop,”
**US Patent No. 7,174,144**(Feb. 06, 2007). - Tsung-Hsien Lin, “An Analog Open-Loop VCO Calibration Method,”
**US Patent No. 7,099,643**. (Aug. 29, 2006) - Hung-Ming Chien and Tsung-Hsien Lin, “Linearized Fractional-N Synthesizer with Fixed Charge Pump Offset,”
**US Patent No. 7,082,176**. (July 25, 2006) - Tsung-Hsien Lin, “High Speed Differential Signaling Logic Gate and Applications Thereof,”
**US Patent No. 6,998,877**. (Feb. 14, 2006) - Tsung-Hsien Lin, “50% Duty-Cycle Clock Generator,”
**US Patent No. 6,990,143**. (Jan. 24, 2006) - Tsung-Hsien Lin and Hung-Ming Chien, “Linearized Fractional-N Synthesizer Having a Gated Offset,”
**US Patent No. 6,985,708**. (Jan. 10, 2006) - Tsung-Hsien Lin, “Divider Module for Use in an Oscillation Synthesizer,”
**US Patent No. 6,980,789**. (Dec. 27, 2005) - Tsung-Hsien Lin, “Charge Pump for an Integrated Receiver,”
**US Patent No. 6,975,840**. (Dec. 13, 2005) - Tsung-Hsien Lin, “Applications of a Differential Latch,”
**US Patent No. 6,819,915**. (Nov. 16, 2004) - Tsung-Hsien Lin, “High Speed Differential Signaling Logic Gate and Applications Thereof,”
**US Patent No. 6,756,821**. (June 29, 2004) - Tsung-Hsien Lin, “A Differential Latch and Applications Thereof,”
**US Patent No. 6,693,476**. (Feb. 17, 2004)